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Machine Learning SoC Architect Jobs in United States

  • Machine Learning SoC Architect

    Meta - Menlo Park, California
    ... and architecture definition of Machine Learning ASICs. 2. Map Data Center workloads to ... following ASIC sub-systems: compute, memory, Network-On-Chip (NoC), collectives, debug etc. and chiplet ...

  • Machine Learning SoC Architect - Debug/Trace Subsystem

    Meta - Menlo Park, California
    ... a lab as well as in the field 2. Define architectural features related to on-chip hardware ... microprocessor architecture, memory systems, on-chip interconnection networks etc. Experience and knowledge ...

  • Machine Learning SoC Architect - Debug/Trace Subsystem

    Meta - Sunnyvale, California
    ... a lab as well as in the field 2. Define architectural features related to on-chip hardware ... microprocessor architecture, memory systems, on-chip interconnection networks etc. Experience and knowledge ...

  • Machine Learning SoC Architect

    Meta - Austin, Texas
    ... and architecture definition of Machine Learning ASICs. 2. Map Data Center workloads to ... following ASIC sub-systems: compute, memory, Network-On-Chip (NoC), collectives, debug etc. and chiplet ...

  • Machine Learning SoC Architect

    Meta - Sunnyvale, California
    ... and architecture definition of Machine Learning ASICs. 2. Map Data Center workloads to ... following ASIC sub-systems: compute, memory, Network-On-Chip (NoC), collectives, debug etc. and chiplet ...