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Intel Careers Logic Design Engineer Jobs

  • Senior Logic Design Engineer

    Intel - Bengaluru, India
    ... Job Description Energetic and passionate senior Logic Design Engineers. Person should be able to independently work and develop various logic design and development activities including micro ...
  • SoC Logic Design Engineer

    Intel - San José, Costa Rica
    ... -chip and ASIC designs. Key responsibilities: Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and ...
  • SoC Logic Design Engineer

    Intel - Hillsboro, Oregon
    ... Logic Design Engineer. We are developing the next generation prototype solutions across Supercomputing ... : Working with architects to define, implement the handshake logic between IP and SOC and integrate them ...
  • IP Logic Design Engineer

    Intel - San José, Costa Rica
    ... Job Description Develops the logic design, register transfer level (RTL) coding, and ... optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design ...
  • SoC Logic Design Engineer

    Intel - Hillsboro, Oregon
    ... Scale Computing team as a Logic Design Engineer. We are developing the next generation prototype ... : Working with architects to define, implement the handshake logic between IP and SOC and integrate them ...
  • SoC Logic Design Engineer

    Intel - Hillsboro, Oregon
    ... Scale Computing team as a Logic Design Engineer. We are developing the next generation prototype ... : Working with architects to define, implement the handshake logic between IP and SOC and integrate them ...
  • SoC Logic Design Engineer

    Intel - Folsom, California
    ... to: Logic design, Register Transfer Level (RTL) coding, and simulation to generate cell ... development of Architecture and Microarchitecture specifications for the Logic components. Provide IP ...
  • SoC Logic Design Engineer

    Intel - San José, Costa Rica
    ... Job Description Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or ...
  • GPU Logic Design Engineer

    Intel - Bengaluru, India
    ... blocks. Definition and development of microarchitecture specifications, logic designs, and HDL code ... . Integration and maintenance of HDL models and verification environments for simulation and ASIC logic ...
  • SoC Logic Design Engineer

    Intel - Hillsboro, Oregon
    ... Job Description Come join the Extreme Scale Computing team as a Logic Design Engineer ... handshake logic between IP and SOC and integrate them. Working with architects and design engineers to ...
  • GPU Logic Design Engineer

    Intel - Bengaluru, India
    ... Job Description RTL design for 3D Graphics Fixed Function components. Develops the logic ... and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as ...
  • Logic Design Engineer

    Intel - Toronto, Ontario
    ... hiring a technically experienced Logic Design Engineer. The key responsibilities of this person include the following: Logic design, register transfer level (RTL) coding, and simulation for an ...
  • Logic Design Engineer

    Intel - Toronto, Ontario
    ... hiring a technically experienced Logic Design Engineer. The key responsibilities of this person include the following: Logic design, register transfer level (RTL) coding, and simulation for an ...
  • IP Logic Design Engineer

    Intel - Hillsboro, Oregon
    ... wonderful for everyone. DEG/IMSG is seeking an experienced IP Logic Design Engineer for its PCIe and ... help ensure Intel's success in the rapidly growing Cloud Computing and AI domains The IP Logic ...
  • IP Logic Design Engineer

    Intel - Hillsboro, Oregon
    ... wonderful for everyone. DEG/IMSG is seeking an experienced IP Logic Design Engineer for its PCIe and ... help ensure Intel's success in the rapidly growing Cloud Computing and AI domains The IP Logic ...
  • IP Logic Design Engineer

    Intel - Hillsboro, Oregon
    ... wonderful for everyone. DEG/IMSG is seeking an experienced IP Logic Design Engineer for its PCIe and ... help ensure Intel's success in the rapidly growing Cloud Computing and AI domains The IP Logic ...
  • GPU Logic Design Engineer

    Intel - Bengaluru, India
    ... Understanding of hardware architecture and micro architecture definition Experience in RTL coding, logic ... power optimization of logic design components Good verbal/written communication skills ...
  • CPU Logic Design Engineer

    Intel - Austin, Texas
    ... knowledge of hardware modeling issues and logic debug environments. Modern energy-efficient/low-power logic design techniques, including those specifically applicable to high frequency optimization ...
  • Logic Design Methodology Engineer

    Intel - Phoenix, Arizona
    ... efficiency and quality. As a Logic Design Methodology Engineer you will design, develop, test, and debug ...
  • GPU Logic Design Engineer

    Intel - Bengaluru, India
    ... subsystem development Preferred skills and experience: Logic design, SoC/IP level architecture/design ...
  • GPU Logic Design Engineer

    Intel - Bengaluru, India
    ... Job Description If you're interested in computer graphics and working with leading graphi ...
  • Senior IP Logic Design Engineer

    Intel - San José, Costa Rica
    ... Job Description Develops the logic design, register transfer level (RTL) coding, and ... optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design ...
  • DFT Engineer / GPU Logic Design Engineer

    Intel - Bengaluru, India
    ... Job Description Develops the logic design, register transfer level (RTL) coding, and ... strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power ...
  • DFT Engineer / GPU Logic Design Engineer

    Intel - Bengaluru, India
    ... Job Description Develops the logic design, register transfer level (RTL) coding, and ... strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power ...
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