Position:

Engineer/Senior Engineer/Technical Lead (FPGA)

Job Description:

Key Responsibilities

• Responsible for design and development of FPGA RTL with Verilog/VHDL

• To Analyse domain specific technical or low-level requirement and modification as per end customer or system requirement.

• Participate in high level requirements analysis, High level and low-level RTL design.

• Perform testing including unit and functional testing.

• Performs code review following coding guidelines and static code analysis.

• Troubleshoots FPGA design problems which are complex in nature.

• Documenting technical deliverable like FPGA design specifications, design document, code commenting and unit test cases, Release note etc. throughout the project life cycle.

• Follow defined process for FPGA Development life cycle.

• Develops FPGA based solutions from established programming languages or by learning new language required for specific project.

• Develop new approaches to complex design problems.

• Responsible for code and design reviews for the code / design developed by subordinates / peers.

• Technical stakeholder communication (knowing pules of customer, proactive in communication in right way, identifying potential escalation scenarios and pre-emptively handling them)

• Mentoring and team building

Experience and Skills Required

• Strong VHDL/Verilog Programming skills

• In depth knowledge of RTL design, FPGA design, and FPGA design tools.

• Complete FPGA development flow from logic design, place & route, timing analysis closure, simulation, verification, and validation

• Experience with Xilinx/Intel/Lattice/Microchip FPGA families and corresponding development tools.

• Experience in verification/simulation tools Modalism/Questa-sim etc.

• Strong troubleshooting and debugging FPGA implementations on hardware boards.

• Experience with debugging HW/SW issues and the use of equipment/tools such as oscilloscope, logic analyzer, Chip scope/ILA/Signal Tap

• Ability to understand synthesis reports, perform timing analysis and write FPGA design constraints.

• Hands-on experience on communication protocols (UART/I2C/SPI etc.) and bus interfaces (AMBA/AXI etc.)

• Use of hardware such as oscillator and logic analyzers for hardware debugging

• Good understanding of digital electronics and design practices

• Strong sense of ownership, passionate, fast learner, analytical mind set, perfection seeker.

• Excellent interpersonal, communication, collaboration and presentation skills.

Personal Attributes

• Incumbent generally works with less supervision and has ability to solve complex problems arising during the flow of work.

• Limited guidance and direction are provided.

• Be a highly energetic self-starter.

• Be an open and excellent communicator.

• Have exceptional interpersonal skills.

• Be a consummate team player.

• Interface well with Client Engineer Team members and other Business Units of eInfochips

• Finally, this individual must have an uncompromising level of personal integrity.

Location:

IN-MH-Pune, India-Baner (eInfochips)

Time Type:

Full time

Job Category:

Engineering Services

Arrow Electronics, Inc.'s policy is to provide equal employment opportunities to all qualified employees and applicants without regard to race, color, religion, age, sex, marital status, gender identity or expression, sexual orientation, national origin, disability, citizenship, veran status, genetic information, or any other characteristics protected by applicable state, federal or local laws. Our policy of equal employment opportunity and affirmative action applies to all employment decisions personnel policies and practices, or programs.