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Intel Careers 288 Jobs

  • Front-end RTL/Verification Tools & Methodology Engineer

    Intel - San José, Costa Rica
    ... best in class Front End tools, flows and methodology. They work closely with project logic design and ... explore new AI ML tools and solutions to help designer and verifier improve overall design cycle ...

  • SoC Logic Design Engineer

    Intel - San José, Costa Rica
    ... transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and ... various logic design aspects ranging from RTL to timing/power convergence. Applies various strategies ...

  • SoC RTL Designer Engineer

    Intel - Folsom, California
    ... designs into high volume production SoC Power Management RTL design using Verilog/System Verilog ... validation of discrete graphics SoC products, including: Creating a design to produce key assets ...

  • Senior Emulation Engineer

    Intel - Malaysia
    ... with a good understanding of logic design concepts. Verilog, System Verilog. RTL simulation ... Job Description Builds emulation and FPGA models and solutions from RTL design using ...

  • SoC Logic Design Engineer

    Intel - San José, Costa Rica
    ... Job Description Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or ...

  • Client Chipsets Full Chip UPF Integration Engineer

    Intel - Malaysia
    ... Job Description Understands the logic of design, register transfer level (RTL) coding, and simulation for an SoC design and integrates UPF (Unified Power Format) of IP blocks and subsystems ...

  • CPU-SoC Silicon Design Engineering Part-Time Intern

    Intel - Malaysia
    ... -voltage I/O, and layout design for Intel's SOC. Integrate third-party IPs into the system, ensuring ... . Validate and integrate third-party IPs, working closely with design teams to implement low-level RTL design ...

  • SOC DFT Design Engineering Graduate Trainee

    Intel - Kulim, Malaysia
    ... opportunity to be trained and to gain exposure to perform SoC design work such as:- RTL logic design in System ... Structural Design, SoC RTL, Architecture/Microarchitecture, IP Design, Post-Silicon Manufacturing and other ...

  • SOC DFT Engineer

    Intel - Bengaluru, India
    ... Job Description Develops the logic design, register transfer level (RTL) coding ... , tools, and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to ...

  • SOC DFT Engineer

    Intel - Bengaluru, India
    ... Job Description Develops the logic design, register transfer level (RTL) coding ... , tools, and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to ...

  • SoC Power Management RTL Design Engineer

    Intel - Bengaluru, India
    ... Intel and we are looking for a SoC Design Engineer to join our team. In this position you will help us ... implement new features in RTL at IP or SOC level - Collaborate with cross-functional teams (FW, Validation ...

  • SOC DFT Engineer

    Intel - Bengaluru, India
    ... Job Description Develops the logic design, register transfer level (RTL) coding ... , tools, and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to ...

  • SoC Design Engineer: ISCP SoC Front-End Design Team

    Intel - Malaysia
    ... Job Description Be a part of IP Security Client Product Group, SoC Front End Design team ... but not limited to: Involving in microarchitecture/RTL logic/testbench/verification ...

  • SoC Design Engineer: ISCP SoC Front-End Design Team

    Intel - Malaysia
    ... Job Description Be a part of IP Security Client Product Group, SoC Front End Design team ... but not limited to: Involving in microarchitecture/RTL logic/testbench/verification ...

  • Staff SoC Design Engineer: ISCP SoC Front-End Design Team

    Intel - Malaysia
    ... /RTL logic/testbench/verification environment design and integration/debug at various levels.2 ... Intel's client chipsets and SoC products. Collaborate across teams including IP Design, Firmware ...

  • Staff SoC Design Engineer: ISCP SoC Front-End Design Team

    Intel - Malaysia
    ... leadership in microarchitecture/RTL logic/testbench/verification environment design and integration/debug at ... Intel's client chipsets and SoC products. Collaborate across teams including IP Design ...

  • Staff SoC Design Engineer: ISCP SoC Front-End Design Team

    Intel - Malaysia
    ... Intel's client chipsets and SoC products. Collaborate across teams including IP Design, Firmware ... logic/testbench/verification environment design and integration/debug at various levels.2. Involving in ...

  • IFS, Design For Test (DFT) Engineer

    Intel - Hillsboro, Oregon
    ... logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. Performs ...

  • Staff SoC Design Engineer: ISCP SoC Front-End Design Team

    Intel - Malaysia
    ... Intel's client chipsets and SoC products. Collaborate across teams including IP Design, Firmware ... logic/testbench/verification environment design and integration/debug at various levels.2. Involving in ...

  • Staff SoC Design Engineer: ISCP SOC Front-End Design Team

    Intel - Malaysia
    ... microarchitecture/RTL logic/testbench/verification environment design and integration/debug at various levels ... Intel’s client chipsets and SoC products. Collaborate across teams including IP Design, Firmware ...

  • SoC Logic Design Engineer Intern

    Intel - Phoenix, Arizona
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - Baton Rouge, Louisiana
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - Trenton, New Jersey
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - Atlanta, Georgia
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - Jefferson City, Missouri
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - St Thomas, Virgin Islands
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - Washington, District Of Columbia
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - Annapolis, Maryland
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - Bismarck, North Dakota
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...

  • SoC Logic Design Engineer Intern

    Intel - Salt Lake City, Utah
    ... design in the most efficient fashion possible Ensure RTL Quality checks for SoC and Subsystems ... -generation SoC designs, including microarchitecture development, RTL coding and integration, and physical ...
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