Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high-energy engineers to help achieve that mission.

As Microsoft's cloud business continues to grow the ability to develop new generation silicon is of paramount importance. To achieve this goal, Microsoft’s Cloud Compute Development Organization (CCDO) is seeking seasoned, passionate, driven and intellectually curious engineers to join our silicon hardware physical design team, covering RTL to GDS methodology, design convergence, and design quality for our projects. We are responsible for delivering cutting-edge, CPU-based custom SOC designs that can perform complex and high-performance functions in the most efficient manner. This team will be involved in numerous projects within Microsoft developing CPU based SOCs silicon for data centres.

Responsibilities

In this role, you will be responsible to:

• Own execution from synthesis to place and route of partition through all signoff including timing signoff, physical verification, EMIR signoff, Formal Equivalence, and Low Power Verification.

• Own partition floorplanning for optimizing blocks for Power, Performance and Area.

• Additionally flow flush PD TFM on few design partitions for early identification of any design PD flow issues before every PD TFM release is proliferated and deployed across all partitions/subchips for PD execution.

• Partner closely with PD flow/CAD team and PD methodology team to flag & fix PD TFM issues upfront and ensure those are fixed in the next PD TFM release from CAD or are updated in the design project layer (as appropriate).

• Have close collaboration with RTL team to help drive and resolve design issues related to block closure.

• Understand tools, flows, and overall design methodology in design construction, signoff, and optimization with a data driven approach.

• Have good scripting skills in one or more scripting languages (viz., Tcl, Perl). Expertise in Python will be a big plus.

• Be a disciplined executor and have keen interest in learning and be forthcoming to deliver to requirements of the program, learn from senior team members.

Qualifications

• BS/MS in Electronics or Electrical or Computer Engineering

• Min 5+ years of experience in semiconductor design.

• Great communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams.

• Proven track record of implementing designs through synthesis, floorplanning, place and route, extraction, timing, and physical verification.

Preferred:

• Large SoC/CPU/IP design tape-out experience in the latest foundry process nodes.

• Excellent project management skills and ability to juggle multiple projects at once.

• Strong understanding of constraints generation, STA, timing optimization, and timing closure.

• In-depth understanding of design tradeoffs for power, performance, and area.

• Hands on experience with CTS techniques such as Htree, custom clock tree,

• Experience of implementing (VA Planning, secondar PG planning) in multi-voltage, multi-powerdomain, and low power designs.

• Experience and knowledge of formal equivalency checks, LEC, LP, UPF, reliability, SI, and Noise.

• Experience in EDA tools such as Fusion Compiler, Primetime, StarRC, RedHawk, Formality, etc.

• Exposure and some hands-on experience with PD flows bring up/setup/flow flush, overall know how of PD-TFM and PD methodology is a big plus

• Strong problem-solving and data analysis skills

• Automation skills using scripting languages such as Perl, TCL, or Python.

Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (https://careers.microsoft.com/v2/global/en/accessibility.html) .