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10 Jobs in Folsom, CA

  • SoC RTL Design Engineer

    Intel - Folsom, California
    ... transfer level (RTL) coding, and simulation for an SoC design and integrate logic of IP blocks and ... Bringing logic designs into high volume production SoC Power Management RTL design using Verilog ...
  • SOC Design Engineer

    Intel - Folsom, California
    ... Job Description Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or ...
  • SoC RTL Designer Engineer

    Intel - Folsom, California
    ... designs into high volume production SoC Power Management RTL design using Verilog/System Verilog ... validation of discrete graphics SoC products, including: Creating a design to produce key assets ...
  • SoC RTL Designer Engineer

    Intel - Folsom, California
    ... designs into high volume production SoC Power Management RTL design using Verilog/System Verilog ... validation of discrete graphics SoC products, including: Creating a design to produce key assets ...
  • SoC Logic Design Engineer

    Intel - Folsom, California
    ... to: Logic design, Register Transfer Level (RTL) coding, and simulation to generate cell ... Qualifications: 1+ year experience with Logic RTL Design Implementation and Debugging Post ...
  • GPU Verification Engineer

    Intel - Folsom, California
    ... continuous innovation and world-class engineering. We are looking for Experienced Pre-Silicon RTL Design and ... debug support. You will be responsible for verification of complex RTL/logic clusters that go into the ...
  • GPU Integration Engineer

    Intel - Folsom, California
    ... , static timing, timing closure, formal equivalence checking Logic Design and Architecture ... (SoC) products for discrete graphics and throughput computing. We strive to lead the industry through ...
  • GPU Physical Design Engineer

    Intel - Folsom, California
    ... verification at all design hierarchies and end to end from RTL to final product tape-out. In this ... edge process technology and EDA tools. The team is responsible for all SoC level physical design ...
  • GPU Physical Design Engineer

    Intel - Folsom, California
    ... , optimization and verification at all design hierarchies and end to end from RTL to final product tape-out ... in: Logic Design/VLSI/ASIC Design/Architecture Experience in one or more of ASIC style ...
  • GPU Platform Hardware Engineer

    Intel - Folsom, California
    ... , Compute, and Display) hardware intellectual property (IP) blocks and system-on-a-chip (SoC) products for ... organizational boundary get in the way of solving problems. We are looking for a GPU Hardware Engineer to join ...