Home View All Jobs (2,211,469)

Results, order, filter

159 Jobs in California

  • SRAM Circuit Design Engineer

    Apple - Cupertino, California
    ... SRAM Circuit Design Engineer Cupertino,California,United States Hardware Do ... an extraordinary logic/architecture team to formulate design specifications. - Define architecture ...

  • SRAM Circuit Design Engineer

    Apple - San Diego, California
    ... SRAM Circuit Design Engineer San Diego,California,United States Hardware Do ... an extraordinary logic/architecture team to formulate design specifications. - Define architecture ...

  • Senior CPU Subsystem Design Engineer

    Intel - San Jose, California
    ... not limited to: Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or ...

  • Hardware Engineer 5

    ManpowerGroup - Mountain View, California
    ... Job Title: Hardware Design Engineer 5 **Location: Mountain View, CA (Onsite 1-2 times a ... to advanced SoC and block-level design in a collaborative, high-performance environment. The role ...

  • ASIC Engineer, Implementation

    Meta - Sunnyvale, California
    ... on Chip (SoC) and IP for data center applications. Required Skills: ASIC Engineer ... Gate level netlist and debug the aborts, inconclusive and Logic Equivalency failures. Perform RTL ...

  • Senior FPGA Engineer

    Vector Atomic - Pleasanton, California
    ... optical designers to define requirements and select FPGA/SoC parts Assist in the design of custom PCBs based on modern FPGA/SoC devices Identify and address critical design issues to ...

  • SoC RAS Design Tech Lead, Machine Learning Accelerators

    Google - Sunnyvale, California
    ... . Experience of SOC subsystem level logic redundancy design and test architecture. Understanding ... design and leading block or subsystem level RTL development. Preferred qualifications ...

  • Senior Verification Manager

    Nvidia - Santa Clara, California
    ... solving ability. This is a role for a versatile engineer that includes RTL design, verification ... leading a team Extensive design verification experience (RTL, Emulation, or Prototyping) Having ...

  • Silicon Architect

    Meta - Sunnyvale, California
    ... with IP, Design, Implementation, Software, and Product. Lead logic development, develop RTL and ... Logic design and synthesis Static Timing Analysis C, C++, Java, Ruby or ...

  • Senior ASIC Physical Design Engineer, Netlisting

    Nvidia - Santa Clara, California
    ... RTL/logic design for timing closure. Experience in clock-domain-crossing checking, MTBF analysis ... inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer ...

  • Wireless MAC Design Engineer

    Apple - Irvine, California
    ... Wireless MAC Design Engineer Irvine,California,United States Hardware Come ... design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design ...

  • Wireless MAC Design Engineer

    Apple - Sunnyvale, California
    ... Wireless MAC Design Engineer Sunnyvale,California,United States Hardware Come ... design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design ...

  • ASIC Design Engineer, System-ASIC

    Nvidia - Santa Clara, California
    ... , Reset, Sysctrl) RTL design, synthesis, timing Silicon bring-up SOC level integration ... design flow including RTL design, verification, logic synthesis and timing analysis Excellent ...

  • Senior ASIC Design Engineer

    Nvidia - Santa Clara, California
    ... flow including RTL design, verification, logic synthesis and timing analysis. Exposure to ... We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC ...

  • Wireless SoC Low Power Design Engineer

    Apple - Irvine, California
    ... Wireless SoC Low Power Design Engineer Irvine,California,United States Hardware ... specifications - Design, implement, and debug complex logic designs - Integrate complex IPs into SoC - Run ...

  • Wireless SoC Low Power Design Engineer

    Apple - Sunnyvale, California
    ... Wireless SoC Low Power Design Engineer Sunnyvale,California,United States Hardware ... Proficiency in ASIC logic design Extensive experience with SoC power management design including power ...

  • Wireless SoC Low Power Design Engineer

    Apple - San Diego, California
    ... Wireless SoC Low Power Design Engineer San Diego,California,United States Hardware ... Proficiency in ASIC logic design Extensive experience with SoC power management design including power ...

  • Wireless SoC Low Power Design Engineer

    Apple - Sunnyvale, California
    ... Wireless SoC Low Power Design Engineer Sunnyvale,California,United States Hardware ... Proficiency in ASIC logic design Extensive experience with SoC power management design including power ...

  • Wireless SoC Low Power Design Engineer

    Apple - San Diego, California
    ... Wireless SoC Low Power Design Engineer San Diego,California,United States Hardware ... Proficiency in ASIC logic design Extensive experience with SoC power management design including power ...

  • Wireless SoC Low Power Design Engineer

    Apple - Sunnyvale, California
    ... Wireless SoC Low Power Design Engineer Sunnyvale,California,United States Hardware ... Proficiency in ASIC logic design Extensive experience with SoC power management design including power ...

  • SoC Design/Integration & Synthesis Engineer

    Apple - Cupertino, California
    ... SoC Design/Integration & Synthesis Engineer Cupertino,California,United States ... methodologies Experience with scripting languages like Perl or Tcl or Python RTL logic design or ...

  • Senior CPU Design Engineer

    Nvidia - Santa Clara, California
    ... We are looking for a Senior CPU Design Engineer! NVIDIA is seeking best-in-class CPU Design Engineers to design and implement the world’s leading CPU's and SoC's. This position offers you the ...

  • Senior Digital Circuit Design Engineer

    Nvidia - Santa Clara, California
    ... We are now hiring for a Senior Logic and Digital Circuit Design Engineer! NVIDIA has ... the RTL in SystemVerilog, define test cases that will deeply verify the design and carry out test ...

  • Senior Design for Debug Architect and Methodology Engineer

    Nvidia - Santa Clara, California
    ... understanding of ASIC design flow including RTL design, verification, logic synthesis, timing analysis and ... We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ...

  • Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering)

    SpaceX - Irvine, California
    ... Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX ... . SR. SOC/ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At ...

  • Physical Synthesis CAD Engineer

    Apple - Cupertino, California
    ... ** Experience with TCL, Python or Perl scripting languages Knowledge of Logic design fundamentals ... timing analysis and logic equivalence tools Experience with writing synthesizable RTL code ...

  • Senior/Lead RTL to GDSII Digital Implementation

    Cadence Design Systems, Inc. - San Jose, California
    ... , IR Drop, backend design timing and power closure, RTL to GDSII. Experience in scripting in ... , debug, and optimize various aspects of design flows for SoC’s to achieve best Power, Performance and ...

  • SoC Design and Integration Engineer

    Qualcomm - San Diego, California
    ... responsible for RTL Design, flows and methodology for high performance ASICs in sub-5nm process nodes for ... documentation for ASIC development for a variety of products. Determines architecture design, logic design ...

  • ASICS Staff Engineer

    Qualcomm - San Diego, California
    ... all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize ... and resolve clp violations Run Power Aware Conformal Logic Equilalency Check: both RTL 2 Gate and ...

  • Senior Digital Integration & Timing Engineer

    Apple - San Diego, California
    ... , Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification ... Senior Digital Integration & Timing Engineer San Diego,California,United States ...
More