Job Description

• Experience of handling team 4 or more.

• Drives and develops testability and manufacturability of integrated circuits from the component feasibility stage through production ramp.

• Contributes to design, development, and validation of testability circuits, test flows, and methodologies for new products through evaluation, development, and debug of complex test methods. Interfaces with process development, fab, factory, assembly, quality and reliability, and manufacturing groups to enable post silicon HVM ramp.

• Evaluates new designs on automatic test equipment (ATE) and works with the design, DFx, and product development teams to debug functionality and performance issues to root cause.

• Performs ATE device characterization, utilizes that data to define datasheet specifications and performs yield analysis.

• Collaborates with designers to drive design for test/debug/manufacturing (DFT/DFD/DFM) features enabling efficient production testing of new products

• Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions.

• Tests, validates, modifies, and redesigns circuits to guarantee component margin to specification.

• Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability.

• Ensures manufacturability over process and product design through thorough analysis of process and spec corners and works with design to resolve yield issues before manufacturing ramp. Drives test time reduction through analysis of fallout data versus test time for various IPs to balance and drive overall product cost optimizations.

• Analyzes early customer returns with emphasis on driving test hole closure activities.

• Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Leads and drives manufacturing readiness from fab, assembly, and test factory to support engineering sample and customer sample generation (ES milestones), wafer start planning, product qual execution strategy and capacity analysis, and assembly and test site certification activities.

• Works with fab, assembly, and test factory partners and planners to support production ramp.

• May also manage execution of new product introductions in the fab, fab process targeting, product/process optimizations, and participate in factory task forces to bring product perspective and respond to product issues. Optimizes product supply through data analysis of post silicon bin split, die level cherry pick (DLCP), and optimize sort/test content and yield downstream through data analysis.

Qualifications

In this position, you will be responsible for Test vector/content implementation and validation of various DFT features such as Scan, MBIST, JTAG, BScan, etc. for Intel's leading edge SoC designs. MBIST/Array testing will be majority of the work.

• Working with pre-Si design/DFT teams to provide feedback and ensuring vectors are meeting ATE requirements.

• Stabilizing vectors/content from Si bring up to volume production, meet DPM requirements and test cost requirements on ATE.

• Delivering best in class product impacting Intel's bottom line.

• Proven Experience in Design for Test/Debug logic design/implementation of Large SOCs

• Expertise in Scan, ATPG, at-speed test, memory test, algorithms, Boundary scan and JTAG.

• Good experience in micro-architecture, RTL coding, system Verilog, test bench development Knowledge of other ad-hoc DFT tests, on chip interconnect buses.

• Experience with Synopsys and/or mentor tools and basic understanding of the SoC development flow is must.

• Expertise in Si debug, shmoo analysis, statistical analysis to meet DPM and Test Cost targets.

• Knowledge of scripting in Perl, shell, Python.

Qualification:

• Candidate should possess a Bachelors or master's degree in computer/ electrical/Electronic Engineering with about 12+ years of experience.

• Strong knowledge of DFT architecture, design, methodologies and tools - Scan, MBIST, Analog DFT, JTAG, etc. Good understanding of Test Engineering and tester debug is desirable.

• Hands on design/validation experience with strong/proven debug skills.

• A very good team player with good interpersonal, planning and excellent communication skills.

Inside this Business Group

Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. As stewards of Moore's Law, we persistently innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain, particularly for advanced products. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of Foundry Services within Intel Foundry. Foundry Services is a customer-oriented service organization. This business unit is completely dedicated to the success of its customers with full P&L responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement and capacity commitments.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

Working Model

This role will require an on-site presence.